Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/127120
Campo DC | Valor | idioma |
---|---|---|
dc.contributor.author | Del Pino Suárez, Francisco Javier | en_US |
dc.contributor.author | Lalchand Khemchandani, Sunil | en_US |
dc.contributor.author | San Miguel Montesdeoca, Mario | en_US |
dc.contributor.author | Mateos Angulo, Sergio | en_US |
dc.contributor.author | Mayor Duarte, Daniel | en_US |
dc.contributor.author | Saiz Pérez, José Luis | en_US |
dc.contributor.author | Galante Sempere, David | en_US |
dc.date.accessioned | 2023-10-04T08:03:21Z | - |
dc.date.available | 2023-10-04T08:03:21Z | - |
dc.date.issued | 2023 | en_US |
dc.identifier.issn | 2072-666X | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/127120 | - |
dc.description.abstract | This paper presents a novel and compact vector modulator (VM) architecture implemented in 130 nm SiGe BiCMOS technology. The design is suitable for use in receive phased arrays for the gateways of major low Earth orbit (LEO) constellations that operate in the 17.8 to 20.2 GHz frequency range. The proposed architecture uses four variable gain amplifiers (VGA) that are active at any given time and are switched to generate the four quadrants. Compared to conventional architectures, this structure is more compact and produces double the output amplitude. The design offers 6-bit phase control for 360°, and the total root mean square (RMS) phase and gain errors are 2.36° and 1.46 dB, respectively. The design occupies an area of 1309.4 (Formula presented.) m × 1783.8 (Formula presented.) m (including pads). | en_US |
dc.language | spa | en_US |
dc.relation.ispartof | Micromachines | en_US |
dc.source | Micromachines [ISSN 2072-666X], v. 14(6), 1184, mayo 2023 | en_US |
dc.subject | 3307 Tecnología electrónica | en_US |
dc.subject.other | Phased array | en_US |
dc.subject.other | SiGe | en_US |
dc.subject.other | Vector modulator (VM) | en_US |
dc.subject.other | Vector-sum phase shifter (VSPS) | en_US |
dc.title | A 17.8–20.2 GHz Compact Vector-Sum Phase Shifter in 130 nm SiGe BiCMOS Technology for LEO Gateways Receivers | en_US |
dc.type | info:eu-repo/semantics/article | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.3390/mi14061184 | en_US |
dc.identifier.scopus | 2-s2.0-85163969412 | - |
dc.contributor.orcid | 0000-0003-2610-883X | - |
dc.contributor.orcid | 0000-0003-0087-2370 | - |
dc.contributor.orcid | 0000-0001-7296-021X | - |
dc.contributor.orcid | 0000-0003-2565-7335 | - |
dc.contributor.orcid | #NODATA# | - |
dc.contributor.orcid | 0000-0002-7962-1517 | - |
dc.contributor.orcid | 0000-0003-0174-7408 | - |
dc.identifier.issue | 6 | - |
dc.relation.volume | 14 | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Artículo | en_US |
dc.description.numberofpages | 12 | en_US |
dc.utils.revision | Sí | en_US |
dc.date.coverdate | Mayo 2023 | en_US |
dc.identifier.ulpgc | Sí | en_US |
dc.contributor.buulpgc | BU-TEL | en_US |
dc.description.sjr | 0,549 | |
dc.description.jcr | 3,4 | |
dc.description.sjrq | Q2 | |
dc.description.jcrq | Q2 | |
dc.description.scie | SCIE | |
dc.description.miaricds | 10,5 | |
item.grantfulltext | open | - |
item.fulltext | Con texto completo | - |
crisitem.author.dept | GIR IUMA: Tecnología Microelectrónica | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Tecnología Microelectrónica | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Tecnología Microelectrónica | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | GIR IUMA: Tecnología Microelectrónica | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Telemática | - |
crisitem.author.orcid | 0000-0003-2610-883X | - |
crisitem.author.orcid | 0000-0003-0087-2370 | - |
crisitem.author.orcid | 0000-0001-7296-021X | - |
crisitem.author.orcid | 0000-0002-3747-570X | - |
crisitem.author.orcid | 0000-0003-0174-7408 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Del Pino Suárez, Francisco Javier | - |
crisitem.author.fullName | Khemchandani Lalchand, Sunil | - |
crisitem.author.fullName | San Miguel Montesdeoca, Mario | - |
crisitem.author.fullName | Mateos Angulo, Sergio | - |
crisitem.author.fullName | Mayor Duarte, Daniel | - |
crisitem.author.fullName | Saiz Pérez,Jose Luis | - |
crisitem.author.fullName | Galante Sempere, David | - |
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