Identificador persistente para citar o vincular este elemento: http://hdl.handle.net/10553/120334
Campo DC Valoridioma
dc.contributor.authorBarrios Alfaro,Yubalen_US
dc.contributor.authorNeris Tomé, Roménen_US
dc.contributor.authorGuerra Hernández,Raúl Celestinoen_US
dc.contributor.authorLópez Suárez, Sebastián Miguelen_US
dc.contributor.authorSarmiento Rodríguez, Robertoen_US
dc.date.accessioned2023-01-30T12:46:54Z-
dc.date.available2023-01-30T12:46:54Z-
dc.date.issued2022en_US
dc.identifier.isbn9781665459501en_US
dc.identifier.issn2640-5563en_US
dc.identifier.urihttp://hdl.handle.net/10553/120334-
dc.description.abstractThe complexity of electronics systems has increased in the last years, which is mainly motivated by the computational capabilities offered by technologies such as FPGAs and SoCs. This requires a change of paradigm in the design methodology, since traditional workflows based on RTL descriptions can prolong in excess the development and verification time when the complexity of the design increases. This is a bottleneck for certain applications, such as the space industry, where mission programs are hardly constrained and delays are not allowed. This work analyses the alternative of following the High-Level Synthesis methodology, which allows to reduce both design and verification time. In addition, prototyping is also accelerated and a design space exploration of complex hardware architectures can be performed at early stages of the design flow. As use case to demonstrate the viability of following this design methodology, a video compression chain based on the CCSDS 123.0-B-2 standard is fully developed in HLS and implemented on FPGA. The designed compression chain is detailed, including the directives inserted to optimize the design. Finally, the test set-up employed for the validation on a Xilinx Kintex UltraScale XCKU040 FPGA is explained and some preliminary results are presented in terms of resources utilization and frame rate, accomplishing the objectives defined in the H2020 VIDEO project.en_US
dc.languageengen_US
dc.publisherProceedings (Conference on Design of Circuits and Integrated Circuits)en_US
dc.relationVideo Imaging Demonstrator for Earth Observation en_US
dc.sourceDCIS 2022 - Proceedings of the 37th Conference on Design of Circuits and Integrated Systemsen_US
dc.subject3307 Tecnología electrónicaen_US
dc.subject.otherSatellitesen_US
dc.subject.otherSpace missionsen_US
dc.subject.otherInstrumentsen_US
dc.subject.otherVideo sequencesen_US
dc.subject.otherVideo compressionen_US
dc.titleSpeeding up FPGA Prototyping on Space Programs with HLS Workflow. Use Case: Video Compression On-board Satellitesen_US
dc.typeinfo:eu-repo/semantics/conferenceobjecten_US
dc.typeConference Paperen_US
dc.relation.conference37th Conference on Design of Circuits and Integrated Circuits (DCIS 2022)en_US
dc.identifier.doi10.1109/DCIS55711.2022.9970056en_US
dc.identifier.scopus2-s2.0-85145437952-
dc.contributor.orcid#NODATA#-
dc.contributor.orcid#NODATA#-
dc.contributor.orcid#NODATA#-
dc.contributor.orcid#NODATA#-
dc.contributor.orcid#NODATA#-
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Actas de congresosen_US
dc.utils.revisionen_US
dc.date.coverdateDiciembre 2022en_US
dc.identifier.ulpgcen_US
dc.contributor.buulpgcBU-TELen_US
item.fulltextSin texto completo-
item.grantfulltextnone-
crisitem.project.principalinvestigatorLópez Suárez, Sebastián Miguel-
crisitem.event.eventsstartdate16-11-2022-
crisitem.event.eventsenddate18-11-2022-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0001-6186-9971-
crisitem.author.orcid0000-0002-5033-9809-
crisitem.author.orcid0000-0002-4303-3051-
crisitem.author.orcid0000-0002-2360-6721-
crisitem.author.orcid0000-0002-4843-0507-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameBarrios Alfaro,Yubal-
crisitem.author.fullNameNeris Tomé, Romén-
crisitem.author.fullNameGuerra Hernández,Raúl Celestino-
crisitem.author.fullNameLópez Suárez, Sebastián Miguel-
crisitem.author.fullNameSarmiento Rodríguez, Roberto-
Colección:Actas de congresos
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