Please use this identifier to cite or link to this item: http://hdl.handle.net/10553/47683
DC FieldValueLanguage
dc.contributor.authorLopez, Sebastianen_US
dc.contributor.authorVladimirova, Tanyaen_US
dc.contributor.authorGonzalez, Carlosen_US
dc.contributor.authorResano, Javieren_US
dc.contributor.authorMozos, Danielen_US
dc.contributor.authorPlaza, Antonioen_US
dc.contributor.otherPlaza, Antonio-
dc.contributor.otherResano, Javier-
dc.contributor.otherGonzalez, Carlos-
dc.contributor.othermozos, daniel-
dc.contributor.otherLopez, Sebastian-
dc.date.accessioned2018-11-23T15:33:24Z-
dc.date.available2018-11-23T15:33:24Z-
dc.date.issued2013en_US
dc.identifier.issn0018-9219en_US
dc.identifier.urihttp://hdl.handle.net/10553/47683-
dc.description.abstractHyperspectral imaging is an important technique in remote sensing which is characterized by high spectral resolutions. With the advent of new hyperspectral remote sensing missions and their increased temporal resolutions, the availability and dimensionality of hyperspectral data is continuously increasing. This demands fast processing solutions that can be used to compress and/or interpret hyperspectral data onboard spacecraft imaging platforms in order to reduce downlink connection requirements and perform a more efficient exploitation of hyperspectral data sets in various applications. Over the last few years, reconfigurable hardware solutions such as field-programmable gate arrays (FPGAs) have been consolidated as the standard choice for onboard remote sensing processing due to their smaller size, weight, and power consumption when compared with other high-performance computing systems, as well as to the availability of more FPGAs with increased tolerance to ionizing radiation in space. Although there have been many literature sources on the use of FPGAs in remote sensing in general and in hyperspectral remote sensing in particular, there is no specific reference discussing the state-of-the-art and future trends of applying this flexible and dynamic technology to such missions. In this work, a necessary first step in this direction is taken by providing an extensive review and discussion of the (current and future) capabilities of reconfigurable hardware and FPGAs in the context of hyperspectral remote sensing missions. The review covers both technological aspects of FPGA hardware and implementation issues, providing two specific case studies in which FPGAs are successfully used to improve the compression and interpretation (through spectral unmixing concepts) of remotely sensed hyperspectral data. Based on the two considered case studies, we also highlight the major challenges to be addressed in the near future in this emerging and fast growing research area.en_US
dc.languageengen_US
dc.publisher0018-9219-
dc.relation.ispartofProceedings of the IEEEen_US
dc.sourceProceedings of the IEEE[ISSN 0018-9219],v. 101 (6450026), p. 698-722en_US
dc.subject220990 Tratamiento digital. Imágenesen_US
dc.subject.otherIndependent Component Analysisen_US
dc.subject.otherEndmember Extractionen_US
dc.subject.otherCompression Algorithmen_US
dc.subject.otherN-Findren_US
dc.subject.otherImagesen_US
dc.subject.otherFpgaen_US
dc.subject.otherImplementationen_US
dc.subject.otherAccelerationen_US
dc.subject.otherDesignen_US
dc.titleThe promise of reconfigurable computing for hyperspectral imaging onboard systems: A review and trendsen_US
dc.typeinfo:eu-repo/semantics/reviewen_US
dc.typereviewen_US
dc.identifier.doi10.1109/JPROC.2012.2231391en_US
dc.identifier.scopus84874542998-
dc.identifier.isi000315480200010-
dcterms.isPartOfProceedings Of The Ieee-
dcterms.sourceProceedings Of The Ieee[ISSN 0018-9219],v. 101 (3), p. 698-722-
dc.contributor.authorscopusid57187722000-
dc.contributor.authorscopusid15123360700-
dc.contributor.authorscopusid35199832800-
dc.contributor.authorscopusid6507694735-
dc.contributor.authorscopusid6603237007-
dc.contributor.authorscopusid7006613644-
dc.description.lastpage722en_US
dc.identifier.issue6450026-
dc.description.firstpage698en_US
dc.relation.volume101en_US
dc.investigacionIngeniería y Arquitecturaen_US
dc.type2Reseñaen_US
dc.identifier.wosWOS:000315480200010-
dc.contributor.daisngid465777-
dc.contributor.daisngid514480-
dc.contributor.daisngid1391678-
dc.contributor.daisngid1445679-
dc.contributor.daisngid29952157-
dc.contributor.daisngid794696-
dc.contributor.daisngid23075-
dc.identifier.investigatorRIDC-4455-2008-
dc.identifier.investigatorRIDF-3343-2016-
dc.identifier.investigatorRIDA-8452-2018-
dc.identifier.investigatorRIDK-1867-2017-
dc.identifier.investigatorRIDL-8108-2014-
dc.utils.revisionen_US
dc.contributor.wosstandardWOS:Lopez, S-
dc.contributor.wosstandardWOS:Vladimirova, T-
dc.contributor.wosstandardWOS:Gonzalez, C-
dc.contributor.wosstandardWOS:Resano, J-
dc.contributor.wosstandardWOS:Mozos, D-
dc.contributor.wosstandardWOS:Plaza, A-
dc.date.coverdateEnero 2013en_US
dc.identifier.ulpgcen_US
dc.identifier.ulpgcen_US
dc.identifier.ulpgcen_US
dc.identifier.ulpgcen_US
dc.description.sjr1,792
dc.description.jcr5,466
dc.description.sjrqQ1
dc.description.jcrqQ1
dc.description.scieSCIE
item.grantfulltextnone-
item.fulltextSin texto completo-
crisitem.author.deptGIR IUMA: Diseño de Sistemas Electrónicos Integrados para el procesamiento de datos-
crisitem.author.deptIU de Microelectrónica Aplicada-
crisitem.author.deptDepartamento de Ingeniería Electrónica y Automática-
crisitem.author.orcid0000-0002-2360-6721-
crisitem.author.parentorgIU de Microelectrónica Aplicada-
crisitem.author.fullNameLópez Suárez, Sebastián Miguel-
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