Identificador persistente para citar o vincular este elemento:
http://hdl.handle.net/10553/121327
Campo DC | Valor | idioma |
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dc.contributor.author | Del Pino Suárez, Francisco Javier | en_US |
dc.contributor.author | Khemchandani, Sunil Lalchand | en_US |
dc.contributor.author | Hernández, A. | en_US |
dc.contributor.author | Sendra, José Ramón | en_US |
dc.contributor.author | Núñez, A. | en_US |
dc.date.accessioned | 2023-03-17T08:23:50Z | - |
dc.date.available | 2023-03-17T08:23:50Z | - |
dc.date.issued | 2001 | en_US |
dc.identifier.uri | http://hdl.handle.net/10553/121327 | - |
dc.description.abstract | Inductors quality factor is limited by resistive losses in metal traces and by induced currents in both, metal strips and lossy Si substrate. Skin and eddy losses are carefully studied and a new physically based fitting model is presented. The behaviour of spiral inductors fabricated in a standard CMOS 0.6 urn process is modeled. A closed formula that depends on the geometrical parameters and the fabrication process has been obtained. The inductance value has only a ± 10 % error against measured values for a set of six CMOS inductors. Our model is capable to predict the frequency at which maximum Q is obtained. This has been validated against measured data. These equations are coded in a program that requests the desired inductance value at a determined frequency and gives back the geometrical parameters for the inductors with high Q. This methodology can be extended to other technologies varying only the technological process parameters. | en_US |
dc.language | eng | en_US |
dc.subject | 3325 Tecnología de las telecomunicaciones | en_US |
dc.title | Quality Factor Model for Integrated Inductors in CMOS Technology | en_US |
dc.type | info:eu-repo/semantics/lecture | en_US |
dc.type | Lecture | en_US |
dc.relation.conference | Workshop on RF Circuit Technology | en_US |
dc.investigacion | Ingeniería y Arquitectura | en_US |
dc.type2 | Ponencia | en_US |
dc.utils.revision | Sí | en_US |
dc.identifier.ulpgc | Sí | en_US |
dc.contributor.buulpgc | BU-TEL | en_US |
dc.contributor.buulpgc | BU-TEL | en_US |
dc.contributor.buulpgc | BU-TEL | en_US |
dc.contributor.buulpgc | BU-TEL | en_US |
item.grantfulltext | none | - |
item.fulltext | Sin texto completo | - |
crisitem.author.dept | GIR IUMA: Tecnología Microelectrónica | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Tecnología Microelectrónica | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.dept | GIR IUMA: Sistemas de Información y Comunicaciones | - |
crisitem.author.dept | IU de Microelectrónica Aplicada | - |
crisitem.author.dept | Departamento de Ingeniería Electrónica y Automática | - |
crisitem.author.orcid | 0000-0003-2610-883X | - |
crisitem.author.orcid | 0000-0003-0087-2370 | - |
crisitem.author.orcid | 0000-0001-5385-792X | - |
crisitem.author.orcid | 0000-0003-1295-1594 | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.parentorg | IU de Microelectrónica Aplicada | - |
crisitem.author.fullName | Del Pino Suárez, Francisco Javier | - |
crisitem.author.fullName | Khemchandani Lalchand, Sunil | - |
crisitem.author.fullName | Sendra Sendra, José Ramón | - |
crisitem.author.fullName | Núñez Ordóñez, Antonio | - |
Colección: | Ponencias |
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