Title Issue Date
CMOS design and analysis of low-voltage signaling methodology for energy efficient on-chip interconnects García, José C. ; Montiel-Nelson, Juan A. ; Nooshabadi, Saeid Issued date: 2009 DOI: 10.1016/j.mejo.2008.12.003 Source: Microelectronics Journal[ISSN 0026-2692],v. 40, p. 1571-1581 JCR: 0,778 - Q3 SCIE Artículo