GMDS: Hardware implementation of novel real output queuing architecture

Abstract

In this paper, a real output queuing switch prototype implementation is presented. This implementation is based on a novel high speed multidrop backplane and a general purpose line card which includes a Virtex-II 6000 FPGA. This switch is named GMDS (gigabit multidrop switch) and its main features are the switch matrix replacement by the multidrop backplane -increasing system reliability-, variable length packet switching support -avoiding bandwidth efficient loss-, multiple output queuing structure for supporting QoS (quality of service) and a minimum speedup.